Instruction Dispatching Techniques for SMT Processors - Efficient Instruction Queue sharing for SMT Processors

Simultaneous Multi-Threading (SMT) provides an improved technique to enhance resource utilization ability by sharing key data path components among multiple independent threads. When critical resources are shared by multiple threads, effective use of these resources proves to be the most important factor in fully exploiting the system potential. The thread-level parallelism (TLP) present among the threads can be exploited intelligently to compensate the limited instruction level parallelism available among threads. The efficient of sharing of Instruction Queue (IQ) among multiple threads plays a crucial role on the overall system performance. In this book, we discuss the techniques to enhance the usability of IQ to further improve the overall performance.

A propos de l'auteur

Monobrata Debnath received his M.S. in Computer Engineering and Ph.D. in Electrical Engineering in the year 2010 and 2016 respectively from the University Of Texas at San Antonio, where he is currently working as a research scientist. His research interests include computer architecture, networks-on-chip, IoT and Simultaneous Multi-threading.

Détails du produit

• Auteurs: Monobrat Debnath, Monobrata Debnath, Wei-Ming Lin
• Edition: LAP Lambert Academic Publishing
• Langues: Anglais
• Format d'édition: Livre de poche
• Sortie: 01.01.2017
• EAN: 9783330037090
• ISBN: 978-3-33-003709-0
• Pages: 56
• Catégorie: Sciences naturelles, médecine, informatique, technique > Informatique, ordinateurs > Hardware