Fr. 94.00

Risc System/6000 Powerpc System Architecture - Powerpc System Architecture

Anglais · Livre Relié

Expédition généralement dans un délai de 1 à 3 semaines (ne peut pas être livré de suite)

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Klappentext An important sequel to the PowerPC processor book for anyone doing software design, I/O or systems design related to the PowerPC chip. This book gives an overview of the entire system operation and software interface and provides design fundamentals including the very hot topic of porting the PowerPC operating system to the RISC System/6000 PowerPC family. Zusammenfassung Offers support for a wide range of products for the RISC System/6000 product line and AIX operating system! including Uni-processor (UP) and Symmetric Multiple Processor (SMP) systems. Provides information for building many system features such as memory controllers with caches and bus-to-bus bridges. Inhaltsverzeichnis Chapter 1 Introduction Chapter 2 PowerPC Processor Architecture Chapter 3 Architected system Memory Map Chapter 4 Bring-Up and Configuration Architecture Chapter 5 NVRAM Contents and Mapping Chapter 6 Bus Unit Controller (BUC) Architecture Chapter 7 IOCC Architecture Chapter 8 System Resources Chapter 9 External Interrupt Architecture Chapter 10 System Exception Processing Chapter 11 System Bus Architecture Chapter 12 Bring-Up Function and IPLCB Chapter 13 Vital Product Data (VPI) Chapter 14 AIX Based Diagnostics Requirements Appendix A Processor Dependencies Appendix B Standard I/O Interface Appendix C Target Market Categories Appendix D Memory Controller Example Appendix E System Exception Implementation Examples Appendix F IPLCB Example Appendix G AIX Dependencies on the IPLCB Appendix H AIX Command and Event Indicators Appendix I Power IOCC Arch. vs PowerPC IOCC Architecture Appendix J 32/64 Bit BUC Arch. Differences & Considerations Appendix K Big-Endian and Little-Endian Tutorial

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