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The excellence of Printed Circuit Boards (PCBS) has an important outcome on performance of several electronic products. In mass-production of PCBS for electronics manufacturing industries, challenge is made to achieve hundred percentage excellence assurance of product. At manufacturing of PCB various faults are presented which are damaging to precise circuit performance. The industrial environment contains various kinds for faults finding methods in the assembled PCBS. Presently there are many test strategies are available for faults diagnosis in assembled PCBS for production line. In most of the test techniques to inspect the PCB based on manual visual inspection as well as image processing techniques. These all-test strategies find faults in assembled PCB without applying the signals. Usually, visual inspection of PCBS is done manually by inspectors. It is known that humans are subject to make mistakes, and they are slow and less reliable, so this paper aims to design and focus on developing a model to calculate the faults in a PCBS manufactured on a given assembly line, when we apply the signals to printed circuit board using embedded platform.
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Asst. Prof. V.K. Salunkhe obtained an M.Tech in Electronics from Walchand College of Engineering, Sangli, India. Dr. B.G. Patil is working as an Associate Prof. in the Dept. of Electronics at Walchand College of Engineering, Sangli. He has guided more than 100 students at the UG/PG levels. Miss S.V. Salunkhe completed her M.Sc. in Mathematics.
