Ulteriori informazioni
This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors.
Sommario
Multiprocessors and Cache Memory.- Energy Delay Product and Throughput.- Challenges and Issues in Modern Computer Architectures.- Real-Time Power And Performance Aware System.- Fuzzy Logic Theory.
Info autore
Prof Dr Jameel Ahmed received his BS and MS degrees, respectively, in Electronic Engineering and Electrical Engineering from NED University of Engineering & Technology, Karachi, and from the National University of Sciences & Technology (NUST), Pakistan. He later secured a joint PhD degree in Communication Engineering from Hamdard University, Pakistan and Nanyang Technological University (NTU), Singapore. In addition, he pursued a Post Doctorate Fellowship at the School of EEE, Nanyang Technological University (NTU), Singapore. Dr Ahmed has 24 years of professional experience to his credit in the field of teaching & research at undergraduate and graduate levels. He is also the author of four books and various research papers in international journals and conferences. Presently, he is carrying out research as a Principal Investigator on a funded project, and is a Professor and Dean of the Faculty of Engineering & Applied Sciences at Riphah International University in Islamabad-Pakistan.
Riassunto
This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors.
