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Informationen zum Autor Charvaka Duvvury, formerly Texas Instruments, USA Charvaka Duvvury, formerly of Texas Instruments, is currently working as a technical consultant on ESD design methods and ESD qualification support. He has published over 150 technical papers and holds more than 70 patents. He is a co-founder and co-chair of the Industry Council on ESD Target Levels and has been serving as Board of Director of the ESDA since 1997 promoting university education and research in ESD technology. Harald Gossner, Intel, Germany Harald Gossner is Senior Principal Engineer at Intel where for 15 years he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2010 he has joined Intel Mobile Communications overseeing the development of robust mobile systems. Harald has authored and co-authored more than 100 technical papers and one book in the field of ESD and device physics. He holds more than 60 patents on the same topic. In 2006 he became cofounder and co-chair of the Industry Council on ESD Target Levels. Klappentext "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design," an optimization methodology to address both issues in the same design space"-- Zusammenfassung An effective and cost efficient protection of electronic system against ESD stress pulses specified by IEC 61000-4-2 is paramount for any system design. Inhaltsverzeichnis List of Contributors xiii Preface xv Acronyms xvii About the Book xxi 1 Introduction 1 Charvaka Duvvury 1.1 Definition of Co-Design 1 1.2 Overview of the Book 2 1.3 Challenges of System Level ESD Protection 2 1.4 Importance of System Level Protection 2 1.5 Industry-Wide Perception 5 1.6 Purpose and Motivation 8 1.7 Organization and Approach 8 1.8 Outcome for the Reader 12 Acknowledgments 12 References 12 2 Component versus System Level ESD 14 Charvaka Duvvury and Harald Gossner 2.1 ESD Threat in the Real World 14 2.1.1 ESD Control 14 2.1.2 ESD Failure Types 15 2.1.3 ESD Protection Areas 16 2.1.4 ESD Stress Models 17 2.2 Component ESD Qualification 17 2.2.1 Component ESD Tests 17 2.2.2 ESD Levels for IC Production 18 2.2.3 Implications for System Level ESD 20 2.2.4 ESD Technology Roadmap 20 2.3 System Level ESD Tests 21 2.3.1 IEC 61000-4-2 22 2.4 ISO 10605 29 2.5 IEC 61000-4-5 31 2.5.1 System Applications 32 2.5.2 Misconceptions and Miscorrelation of Component and System Level Tests 35 2.5.3 Hard Failures Due to IEC Testing 42 2.6 Soft Failures Due to IEC Testing 42 Acknowledgments 43 References 43 3 System Level Testing for ESD Susceptibility 46 Michael Hopkins 3.1 Introduction 46 3.2 Objectives of System Level Testing 47 3.3 Compliance to ESD Standards 47 3.3.1 Legal Compliance Requirements 47 3.3.2 Compliance to Industry Requirements 48 3.4 Testing for Product Reliability 48 3.5 Standards Requirements for System Level Testing 49 3.5.1 IEC 61000-4-2 49 3.5.2 Automotive Standards for ESD 58 3.5.3 Medical Standards for ESD 60 3.5.4 Avionics Standards for ESD 61 3.5.5 Military ESD Standards 61 3.6 Using the IEC Simulator for Device Testing 62 3.7 Cable Discharge (CDE) Testing 63 3.7.1 Shielded Cables 65 3.7.2 Unshielded Cables 65 3.7.3 Modified Transmission Line Pulsers (TLP) for CDE Testing 66 3.8 Evaluation of Test Results 67 3.8.1 Hard Failure Evaluation 67 3.8....
