Ulteriori informazioni
This book contains extended and revised versions of the best papers presented at the 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, held in Hong Kong, China, in October 2011. The 10 papers included in the book were carefully reviewed and selected from the 45 full papers and 16 special session papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about stimulating new challenges both at the physical and system-design levels, as well as in the test of theses systems.
Sommario
A Low Cost CMOS Polarimetric Ophthalmoscope Scheme for CerebralMalaria Diagnostics.- High Performance SoC Design Using Magnetic Logic and Memory.- A Low-Power Ultra-Fast Capacitor-Less LDO with Advanced Dynamic Push-Pull Techniques.- Improvements to Satisfiability-Based Boolean Function Bi-Decomposition.- Multiplierless Design of Linear DSP Transform.- Self-dependent Equivalent Circuit Modeling of Electrostatic Comb Transducers for Integrated MEMS.- On the Functional Test of Branch Prediction Units Based on the Branch History Table Architecture.- Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade.- 2-2 Sigma-Delta Modulators for Wideband Telecom.- A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process.- Analysis and Design Strategy of On-Chip Charge Pumps for Micro-power Energy Harvesting Applications.
Riassunto
This book contains extended and revised versions of the best papers presented at the 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, held in Hong Kong, China, in October 2011. The 10 papers included in the book were carefully reviewed and selected from the 45 full papers and 16 special session papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about stimulating new challenges both at the physical and system-design levels, as well as in the test of theses systems.
