Pipelined ADC Design and Enhancement Techniques

Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs.

Sommario

Pipelined ADC Design.- ADC Architectures.- Pipelined ADC Architecture Overview.- Scaling Power with Sampling Rate in an ADC.- State of the Art Pipelined ADC Design.- Pipelined ADC Enhancement Techniques.- Rapid Calibration of DAC and Gain Errors in a Multi-bit Pipeline Stage.- A Power Scalable and Low Power Pipelined ADC.- A Sub-sampling ADC with Embedded Sample-and-Hold.- A Capacitive Charge Pump Based Low Power Pipelined ADC.- Summary.

Riassunto

Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs.

Dettagli sul prodotto

• Autori: Imran Ahmed
• Editore: Springer Netherlands
• Lingue: Inglese
• Formato: Tascabile
• Pubblicazione: 11.05.2012
• EAN: 9789400731790
• ISBN: 978-94-0-073179-0
• Pagine: 200
• Peso: 369 g
• Illustrazioni: XXV, 200 p.
• Serie: Analog Circuits and Signal Processing; Analog Circuits and Signal Processing
• Categorie: Scienze naturali, medicina, informatica, tecnica > Tecnica > Elettronica, elettrotecnica, telecomunicazioni; C, Microprocessors, engineering, Circuits and Systems, Electronic circuits, Electronic Circuits and Systems, Computer architecture & logic design, Processor Architectures