CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies - Process-Aware SRAM Design and Test

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

List of contents

and Motivation.- SRAM Circuit Design and Operation.- SRAM Cell Stability: Definition, Modeling and Testing.- Traditional SRAM Fault Models and Test Practices.- Techniques for Detection of SRAM Cells with Stability Faults.- Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques.

About the author

Prof. Sachdev has authored several successful books with Springer

Summary

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

Product details

• Authors: Andre Pavlov, Andrei Pavlov, Manoj Sachdev
• Publisher: Springer Netherlands
• Languages: English
• Product format: Hardback
• Released: 29.06.2009
• EAN: 9781402083624
• ISBN: 978-1-4020-8362-4
• No. of pages: 194
• Weight: 476 g
• Illustrations: XVI, 194 p.
• Series: Frontiers in Electronic Testing; Frontiers in Electronic Testing; Frontiers in Electronic Testin
• Subject: Natural sciences, medicine, IT, technology > Technology > Electronics, electrical engineering, communications engineering