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Processor Design provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. After a brief introduction to processor architectures and how processor designers have sometimes failed to deliver what was expected, the authors introduce a generic flow for embedded on-chip processor design and start to explore the vast design space of on-chip processing. The types of processor cores covered include general purpose RISC cores, traditional DSP, a VLIW approach to signal processing, processor cores that can be customized for specific applications, reconfigurable processors, protocol processors, Java engines, and stream processors. Co-processor and multi-core design approaches that deliver application-specific performance over and above that which is available from single-core designs are also described.
List of contents
Embedded Computer Architecture Fundamentals.- Beyond the Valley of the Lost Processors: Problems, Fallacies, and Pitfalls in Processor Design.- Processor Design Flow.- General-Purpose Embedded Processor Cores - The COFFEE RISC Example.- The DSP and Its Impact on Technology.- VLIW DSP Processor for High-End Mobile Communication Applications.- Customizable Processors and Processor Customization.- Run-Time Reconfigurable Processors.- Coprocessor Approach to Accelerating Multimedia Applications.- Designing Soft-Core Processors for FPGAs.- Protocol Processor Design Issues.- Java Co-Processor for Embedded Systems.- Stream Multicore Processors.- Processor Clock Generation and Distribution.- Asynchronous and Self-Timed Processor Design.- Early-Estimation Modeling of Processors.- System Level Simulations.- Programming Tools for Reconfigurable Processors.- Software-Based Self-Testing of Embedded Processors.- Future Directions in Processor Design.
About the author
Dr. Jari Nurmi is Professor at Tampere University of Technology and his expertises lie in: DSP Processor Architecture, Network-on-Chip, Embedded System-on-Chip Design, Integrated Signal Processing and Digital Communication Circuits.
Jari Nurmi has edited one successful book for Springer.
Summary
Processor Design provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. After a brief introduction to processor architectures and how processor designers have sometimes failed to deliver what was expected, the authors introduce a generic flow for embedded on-chip processor design and start to explore the vast design space of on-chip processing. The types of processor cores covered include general purpose RISC cores, traditional DSP, a VLIW approach to signal processing, processor cores that can be customized for specific applications, reconfigurable processors, protocol processors, Java engines, and stream processors. Co-processor and multi-core design approaches that deliver application-specific performance over and above that which is available from single-core designs are also described.
Additional text
From the reviews:
“Editor Jari Nurmi’s proposal was to put together the first effective textbook aimed at the subject of processor design. The book comprises 21 chapters, written by a total of 45 contributing authors with backgrounds in both academic and industrial fields. … To summarize, this book offers a nice overview on the steps involved in designing a soft-processor, as well as a good perspective on past architectures and current trends in processor design.” (Ricardo Jasinski, The Computer Journal, Vol. 53 (1), 2010)
Report
From the reviews: "Editor Jari Nurmi's proposal was to put together the first effective textbook aimed at the subject of processor design. The book comprises 21 chapters, written by a total of 45 contributing authors with backgrounds in both academic and industrial fields. ... To summarize, this book offers a nice overview on the steps involved in designing a soft-processor, as well as a good perspective on past architectures and current trends in processor design." (Ricardo Jasinski, The Computer Journal, Vol. 53 (1), 2010)
