High-Bandwidth Memory Interface

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.

List of contents

An introduction to high-speed DRAM.- An I/O Line Configuration and Organization of DRAM.- Clock generation and distribution.- Transceiver Design.- TSV Interface for DRAM.

Product details

• Authors: Chulwoo Kim, Hyun-Woo Lee, Junyoung Song
• Publisher: Springer, Berlin
• Languages: English
• Product format: Paperback / Softback
• Released: 18.11.2013
• EAN: 9783319023809
• ISBN: 978-3-31-902380-9
• No. of pages: 88
• Dimensions: 154 mm x 10 mm x 239 mm
• Weight: 168 g
• Illustrations: VIII, 88 p. 91 illus., 41 illus. in color.
• Series: SpringerBriefs in Electrical and Computer Engineering
• Subjects: Natural sciences, medicine, IT, technology > Technology > Electronics, electrical engineering, communications engineering; C, engineering, Circuits and Systems, Electronic Circuits and Devices, Electronic devices & materials, Electronics, Microelectronics, Electronics and Microelectronics, Instrumentation, Electronics engineering, Electronic circuits, Electronic Circuits and Systems, Electronics: circuits & components