Reconfigurable Obfuscation Techniques for the IC Supply Chain - Using FPGA-Like Schemes for Protection of Intellectual Property

This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.   

List of contents

Introduction.- Background.- A Security-aware CAD Flow for the Obfuscation Method.- Physical Implementation.- Security Analysis.- Securing the Bitstream of hASIC.

About the author

Zain Ul Abideen received his Ph.D. from Tallinn University of Technology (TalTech), Tallinn, Estonia, and his M.S. degree in computer engineering (Master in Integration, Security and Trust in Embedded systems) from Grenoble Institute of Technology, Grenoble, France. He is currently a postdoctoral researcher at Carnegie Mellon University, Pittsburgh, PA, USA. His research primarily focuses on ASIC design, hardware security, PUFs, TRNGs, reliable hardware designs, and post-quantum cryptography.
Samuel Pagliarini received his PhD from Telecom ParisTech, Paris, France, in 2013. He has held research positions with the University of Bristol, Bristol, UK, and Carnegie Mellon University, Pittsburgh, PA, USA. From 2019 to 2023, he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn, Estonia. He is currently a professor at Carnegie Mellon University, Pittsburgh, PA, USA.

Product details

• Authors: Zain Ul Abideen, Samuel Pagliarini, Zain Ul Abideen
• Publisher: Springer, Berlin
• Languages: English
• Product format: Hardback
• Released: 01.01.2025
• EAN: 9783031775086
• ISBN: 978-3-0-3177508-6
• No. of pages: 211
• Dimensions: 168 mm x 14 mm x 240 mm
• Weight: 564 g
• Illustrations: XXI, 211 p. 88 illus., 78 illus. in color.
• Series: Synthesis Lectures on Digital Circuits & Systems
• Subjects: Natural sciences, medicine, IT, technology > Technology > Electronics, electrical engineering, communications engineering; Rechnerarchitektur und Logik-Entwurf, Eingebettete Systeme, Embedded Systems, Logic Design, Electronics Design and Verification, Design for Trust, hardware security, Hardware obfuscation, Trustworthy IC, Secure ASIC design