Fr. 136.00

Silicon Based Unified Memory Devices and Technology

English · Paperback / Softback

Shipping usually within 3 to 5 weeks

Description

Read more

Zusatztext "This book gives a very good overview of existing and emerging NVM technologies. This is going to be a valuable reference book for both undergraduate and postgraduate students. The book benefits from the detailed description of technologies and structures of NVM devices. It shows the variety and differences between all known NVM structures. The book should also help VLSI designers to better understand advantages and drawbacks of different NVM structures."- Sergei Skorobogatov! University of Cambridge! UK Informationen zum Autor Dr. Arup Bhattacharyya has forty years of leadership and pioneering contributions in the area of microelectronics and nanoelectronics. He has contributed pioneering activities and innovations in process! device! interconnect! and integration of many generations of microelectronics and nano-electronics. His inventions include nearly 300 U.S. and international Patents and invention publications in technologies such as CCD! BIPOLAR! FET! NVM! FLASH! ANTIFUSE! SOI! BICMOS! SOLAR-CELLS! and SOC. Some of the applications of Dr. Bhattacharyya's inventions include electronic Memories! Microprocessors and Controllers! Random and Programmable Logic Devices! Nonvolatile Devices! Energy-conversion devices! ASICs! ASDs! and SMART Electronic Devices. He has experience in R&D leadership! Program management and Technology transfer! Technical Education and Consultancy! Strategic Planning! Infrastructure Development! Product Development! and Manufacturability. Additional experiences include University teaching! volunteering for science and engineering promotion! service to professional organizations! and consultancy to the UN. Zusammenfassung The primary focus of this book is on basic device concepts, memory cell design, and process technology integration. The book provides Industrial R&D personnel with the knowledge to drive the future memory technology with the established silicon FET-based establishments of their own. Inhaltsverzeichnis PART I CONVENTIONAL SILICON BASED NVM DEVICES. SILICON BASED DIGITAL MEMORIES AND NVMs: AN INTRODUCTORY OVERVIEW. HISTORICAL PROGRESSION OF NVM DEVICES. GENERAL PROPERTIES OF DIELECTRICS AND INTERFACE FOR NVM DEVICES. ELECTRIC FILMS FOR NVM DEVICES. NVM UNIQUE DEVICE PROPERTIES. NVM DEVICE STACK DESIGN. NVM CELLS, ARRAYS AND DISTURBS. NVM PROCESS TECHNOLOGY AND INTEGRATION SCHEME. NVM DEVICE RELIABILITY. CONVENTIONAL NVM CHALLENGES. PART II ADVANCED NVM DEVICES AND TECHNOLOGY. VOLTAGE SCALABILITY. HIGH-K DIELECTRICS FILMS FOR NVM. BAND ENGINEERING FOR NVM DEVICES. ENHANCED TECHNOLOGY INTEGRATION FOR NVM. PLANAR MULTILEVEL STORAGE NVM DEVICES. NON PLANAR AND 3D DEVICES AND ARRAYS. EMERGING NVMs & LIMITATIONS OF CURRENT NVM DEVICES. ADVANCED SILICON-BASED NVM DEVICE CONCEPTS. PART III: SUM: SILICON BASED UNIFIED MEMORY. SUM PERSPECTIVE, DEVICE CONCEPTS AND POTENTIALS. SUM TECHNOLOGY. BAND ENGINEERING FOR SUM DEVICES. UNIFUNCTIONAL SUM: THE USUM CELLS AND ARRAY. MULTIFUNCTIONAL SUM: THE MSUM CELLS AND ARRAYS. SUM FUNCTIONAL INTEGRATION, PACKAGING AND POTENTIAL APPLICATION. ...

Product details

Authors Arup Bhattacharyya, Arup (Ceo Bhattacharyya
Publisher Taylor & Francis Ltd.
 
Languages English
Product format Paperback / Softback
Released 08.08.2017
 
EAN 9781138746329
ISBN 978-1-138-74632-9
No. of pages 512
Subjects Natural sciences, medicine, IT, technology > Technology > Electronics, electrical engineering, communications engineering

TECHNOLOGY & ENGINEERING / Electronics / Circuits / General, Electronics: circuits and components, Circuits & components

Customer reviews

No reviews have been written for this item yet. Write the first review and be helpful to other users when they decide on a purchase.

Write a review

Thumbs up or thumbs down? Write your own review.

For messages to CeDe.ch please use the contact form.

The input fields marked * are obligatory

By submitting this form you agree to our data privacy statement.