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Zusatztext ". . . interesting and full of information reported in a unified form . . ." - Gaetano Palumbo! in IEEE Circuits & Devices Magazine! Jan/ Feb 2006! Vol. 22! No. 1 Klappentext A guide to design and analysis of nanoICs using CAD. It offers an introduction to the directions and basic methodology of logic design at the nanoscale! then proceeds to nanotechnologies and CAD! word-level and linear word-level data structures! 3-D topologies based on hypercubes and fault-tolerant computation in hypercube-like structures. Zusammenfassung A guide to design and analysis of nanoICs using CAD. It offers an introduction to the directions and basic methodology of logic design at the nanoscale, then proceeds to nanotechnologies and CAD, word-level and linear word-level data structures, 3-D topologies based on hypercubes and fault-tolerant computation in hypercube-like structures. Inhaltsverzeichnis PREFACEACKNOWLEDGEMENTSINTRODUCTIONProgress From Micro- to NanoelectronicsLogic Design in Spatial DimensionsTowards Computer-Aided Design of NanoICsMethodologyExample: Hypercube Structure of Hierarchical FPGASummaryProblemsFurther ReadingReferencesNANOTECHNOLOGIESNanotechnologiesNanoelectronic DevicesDigital Nanoscale Circuits: Gates vs. ArraysMolecular ElectronicsScaling and FabricationSummaryProblemsFurther ReadingReferencesBASICS OF LOGIC DESIGN IN NANOSPACEGraphsData Structures for Switching FunctionsSum-of-Products ExpressionsShannon Decision Trees and DiagramsReed-Muller ExpressionsDecision Trees and DiagramsArithmetic ExpressionsDecision Trees and DiagramsSummaryProblemsFurther ReadingReferencesWORD-LEVEL DATA STRUCTURESWord-level Data StructuresWord-level Arithmetic ExpressionsWord-level Sum-of-Products ExpressionsWord-level Reed-Muller ExpressionsSummaryProblemsFurther ReadingReferencesNANOSPACE AND HYPERCUBE-LIKE DATA STRUCTURESSpatial StructuresHypercube Data StructureAssembling of HypercubesN-Hypercube DefinitionDegree of Freedom and RotationCoordinate DescriptionN-Hypercube Design for n > 3 DimensionsEmbedding a Binary Decision Tree in N-HypercubeAssemblingSpatial Topological MeasurementsSummaryProblemsFurther ReadingReferencesNANODIMENSIONAL MULTILEVEL CIRCUITSGraph-Based Models in Logic Design of Multilevel NetworksLibrary of N-Hypercubes for Elementary Logic FunctionsHybrid Design Paradigm: N-Hypercube and DAGManipulation of N-HypercubesNumerical Evaluation of 3-D StructuresSummaryFurther ReadingReferencesLINEAR WORD-LEVEL MODELS OF MULTILEVEL CIRCUITSLinear ExpressionsLinear Arithmetic ExpressionsLinear Arithmetic Expressions of Elementary FunctionsLinear Decision DiagramsRepresentation of a Circuit Level by Linear ExpressionLinear Decision Diagrams for Circuit RepresentationTechnique for Manipulating the CoefficientsLinear Word-level Sum-of-Products ExpressionsLinear Word-level Reed-Muller ExpressionsSummaryProblemsFurther ReadingReferencesEVENT-DRIVEN ANALYSIS OF HYPERCUBE-LIKE TOPOLOGYFormal Definition of Change in a Binary SystemComputing Boolean DifferencesModels of Logic Networks in Terms of ChangeMatrix Models of ChangeModels of Directed Changes in Algebraic FormLocal Computation Via Partial Boolean DifferenceGenerating Reed-Muller Expressions by Logic Taylor SeriesArithmetic Analogs of Boolean Differences and Logic Taylor ExpansionSummaryProblemsFurther ReadingReferencesNANODIMENSIONAL MULTIVALUED CIRCUITSIntroduction to Multivalued LogicSpectral TechniqueMultivalued Decision Trees and Decision DiagramsConcept of Change in Multivalued CircuitsGeneration of Reed-Muller ExpressionsLinear Word-level Expressions of Multivalued FunctionsLinear Nonarithmetic Word-level Representation of Multivalued FunctionsSummaryProblemsFurther ReadingReferencesPARALLEL COMPUTATION IN NANOSPACEData Structures and Massive Parallel ComputingArraysLinear Systolic Arrays for Computing Logic FunctionsComputing Reed-Muller ExpressionsComputing Boolean DifferencesComputing Arithmetic Ex...
