Artificial Intelligence Applications and Reconfigurable Architectures

ARTIFICIAL INTELLIGENCE APPLICATIONS and RECONFIGURABLE ARCHITECTURES
 
The primary goal of this book is to present the design, implementation, and performance issues of AI applications and the suitability of the FPGA platform.
 
This book covers the features of modern Field Programmable Gate Arrays (FPGA) devices, design techniques, and successful implementations pertaining to AI applications. It describes various hardware options available for AI applications, key advantages of FPGAs, and contemporary FPGA ICs with software support. The focus is on exploiting parallelism offered by FPGA to meet heavy computation requirements of AI as complete hardware implementation or customized hardware accelerators. This is a comprehensive textbook on the subject covering a broad array of topics like technological platforms for the implementation of AI, capabilities of FPGA, suppliers' software tools and hardware boards, and discussion of implementations done by researchers to encourage the AI community to use and experiment with FPGA.
 
Readers will benefit from reading this book because
* It serves all levels of students and researcher's as it deals with the basics and minute details of Ecosystem Development Requirements for Intelligent applications with reconfigurable architectures whereas current competitors' books are more suitable for understanding only reconfigurable architectures.
* It focuses on all aspects of machine learning accelerators for the design and development of intelligent applications and not on a single perspective such as only on reconfigurable architectures for IoT applications.
* It is the best solution for researchers to understand how to design and develop various AI, deep learning, and machine learning applications on the FPGA platform.
* It is the best solution for all types of learners to get complete knowledge of why reconfigurable architectures are important for implementing AI-ML applications with heavy computations.
 
Audience
 
Researchers, industrial experts, scientists, and postgraduate students who are working in the fields of computer engineering, electronics, and electrical engineering, especially those specializing in VLSI and embedded systems, FPGA, artificial intelligence, Internet of Things, and related multidisciplinary projects.

List of contents

Preface xiii
 
1 Strategic Infrastructural Developments to Reinforce Reconfigurable Computing for Indigenous AI Applications 1
Deepti Khurge
 
1.1 Introduction 2
 
1.2 Infrastructural Requirements for AI 2
 
1.3 Categories in AI Hardware 4
 
1.3.1 Comparing Hardware for Artificial Intelligence 8
 
1.4 Hardware AI Accelerators to Support RC 9
 
1.4.1 Computing Support for AI Application: Reconfigurable Computing to Foster the Adaptation 9
 
1.4.2 Reconfiguration Computing Model 10
 
1.4.3 Reconfigurable Computing Model as an Accelerator 11
 
1.5 Architecture and Accelerator for AI-Based Applications 15
 
1.5.1 Advantages of Reconfigurable Computing Accelerators 20
 
1.5.2 Disadvantages of Reconfigurable Computing Accelerators 21
 
1.6 Conclusion 22
 
References 22
 
2 Review of Artificial Intelligence Applications and Architectures 25
Rashmi Mahajan, Dipti Sakhare and Rohini Gadgil
 
2.1 Introduction 25
 
2.2 Technological Platforms for AI Implementation--Graphics Processing Unit 27
 
2.3 Technological Platforms for AI Implementation--Field Programmable Gate Array (FPGA) 28
 
2.3.1 Xilinx Zynq 28
 
2.3.2 Stratix 10 NX Architecture 29
 
2.4 Design Implementation Aspects 30
 
2.5 Conclusion 32
 
References 32
 
3 An Organized Literature Review on Various Cubic Root Algorithmic Practices for Developing Efficient VLSI Computing System--Understanding Complexity 35
Siba Kumar Panda, Konasagar Achyut, Swati K. Kulkarni, Akshata A. Raut and Aayush Nayak
 
3.1 Introduction 36
 
3.2 Motivation 37
 
3.3 Numerous Cubic Root Methods for Emergent VLSI Computing System--Extraction 45
 
3.4 Performance Study and Discussion 50
 
3.5 Further Research 50
 
3.6 Conclusion 59
 
References 59
 
4 An Overview of the Hierarchical Temporal Memory Accelerators 63
Abdullah M. Zyarah and Dhireesha Kudithipudi
 
4.1 Introduction 63
 
4.2 An Overview of Hierarchical Temporal Memory 65
 
4.3 HTM on Edge 67
 
4.4 Digital Accelerators 68
 
4.4.1 Pim Htm 68
 
4.4.2 Pen Htm 69
 
4.4.3 Classic 70
 
4.5 Analog and Mixed-Signal Accelerators 72
 
4.5.1 Rcn Htm 72
 
4.5.2 Rbm Htm 73
 
4.5.3 Pyragrid 74
 
4.6 Discussion 76
 
4.6.1 On-Chip Learning 76
 
4.6.2 Data Movement 77
 
4.6.3 Memory Requirements 79
 
4.6.4 Scalability 80
 
4.6.5 Network Lifespan 82
 
4.6.6 Network Latency 83
 
4.6.6.1 Parallelism 84
 
4.6.6.2 Pipelining 85
 
4.6.7 Power Consumption 86
 
4.7 Open Problems 88
 
4.8 Conclusion 89
 
References 90
 
5 NLP-Based AI-Powered Sanskrit Voice Bot 95
Vedika Srivastava, Arti Khaparde, Akshit Kothari and Vaidehi Deshmukh
 
5.1 Introduction 96
 
5.2 Literature Survey 96
 
5.3 Pipeline 98
 
5.3.1 Collect Data 98
 
5.3.2 Clean Data 98
 
5.3.3 Build Database 98
 
5.3.4 Install Required Libraries 98
 
5.3.5 Train and Validate 98
 
5.3.6 Test and Update 98
 
5.3.7 Combine All Models 100
 
5.3.8 Deploy the Bot 100
 
5.4 Methodology 100
 
5.4.1 Data Collection and Storage 100
 
5.4.1.1 Web Scrapping 100
 
5.4.1.2 Read Text from Image 101
 
5.4.1.3 MySQL Connectivity 101
 
5.4.1.4 Cleaning the Data 101
 
5.4.2 Various ML Models 102
 
5.4.2.1 Linear Regression and Logistic Regression 102
 
5.4.2.2 SVM - Support Vector Mach

About the author

Anuradha Thakare, PhD, is a Dean of International Relations and Professor in the Department of Computer Engineering at Pimpri Chinchwad College of Engineering, Pune, India. She has more than 22 years of experience in academics and research and has published more than 80 research articles in SCI journals as well several books. Sheetal Bhandari, PhD, received her degree in the area of reconfigurable computing. She is a postgraduate in electronics engineering from the University of Pune with a specialization in digital systems. She is working as a professor in the Department of Electronics and Telecommunication Engineering and Dean of Academics at Pimpri Chinchwad College of Engineering. Her research area concerns reconfigurable computing and embedded system design around FPGA HW-SW Co-Design.

Summary

ARTIFICIAL INTELLIGENCE APPLICATIONS and RECONFIGURABLE ARCHITECTURES

The primary goal of this book is to present the design, implementation, and performance issues of AI applications and the suitability of the FPGA platform.

This book covers the features of modern Field Programmable Gate Arrays (FPGA) devices, design techniques, and successful implementations pertaining to AI applications. It describes various hardware options available for AI applications, key advantages of FPGAs, and contemporary FPGA ICs with software support. The focus is on exploiting parallelism offered by FPGA to meet heavy computation requirements of AI as complete hardware implementation or customized hardware accelerators. This is a comprehensive textbook on the subject covering a broad array of topics like technological platforms for the implementation of AI, capabilities of FPGA, suppliers' software tools and hardware boards, and discussion of implementations done by researchers to encourage the AI community to use and experiment with FPGA.

Readers will benefit from reading this book because
* It serves all levels of students and researcher's as it deals with the basics and minute details of Ecosystem Development Requirements for Intelligent applications with reconfigurable architectures whereas current competitors' books are more suitable for understanding only reconfigurable architectures.
* It focuses on all aspects of machine learning accelerators for the design and development of intelligent applications and not on a single perspective such as only on reconfigurable architectures for IoT applications.
* It is the best solution for researchers to understand how to design and develop various AI, deep learning, and machine learning applications on the FPGA platform.
* It is the best solution for all types of learners to get complete knowledge of why reconfigurable architectures are important for implementing AI-ML applications with heavy computations.

Audience

Researchers, industrial experts, scientists, and postgraduate students who are working in the fields of computer engineering, electronics, and electrical engineering, especially those specializing in VLSI and embedded systems, FPGA, artificial intelligence, Internet of Things, and related multidisciplinary projects.

Product details

• Authors: Bhandari, Sheetal Umesh (Pimpri Chinchwad College Bhandari, Thakare, Anuradha D. (Pimpri Chinchwad College of Thakare
• Assisted by: Sheetal Umesh Bhandari (Editor), Sheetal Umesh (Pimpri Chinchwad College of Engineering Bhandari (Editor), Anuradha D Thakare (Editor), Anuradha D Thakare (Editor), Anuradha D. Thakare (Editor), Anuradha D. (Pimpri Chinchwad College of Engineering Thakare (Editor), Umesh Bhandari (Editor)
• Publisher: Wiley, John and Sons Ltd
• Languages: English
• Product format: Hardback
• Released: 31.12.2022
• EAN: 9781119857297
• ISBN: 978-1-119-85729-7
• No. of pages: 240
• Subjects: Natural sciences, medicine, IT, technology > IT, data processing > IT; Informatik, Künstliche Intelligenz, KI, Artificial Intelligence, Internet of things, iot, AI, computer science, Electrical & Electronics Engineering, Elektrotechnik u. Elektronik, Intelligente Systeme u. Agenten, Intelligent Systems & Agents