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Zusatztext "...excellent guidebook for interconnect design...highly recommended for design engineers and recent graduates struggling to transition from theory to real-world design." (Choice! Vol. 38! No. 8! April 2001)"This is an excellent book for anyone who has basic circuit theory knowledge...." (E-Streams! Vol. 4! No. 8! August 2001) Informationen zum Autor STEPHEN H. HALL is a Senior Design Engineer at Intel Corporation, Portland, Oregon. GARRETT W. HALL is a Silicon Systems Engineer at Intel Corporation. JAMES A. McCALL is a Senior Design Engineer at Intel Corporation. Klappentext Mikroprozessoren werden immer schneller - generell eine erfreuliche Entwicklung. Eine Folge davon ist aber auch, daß sich Schaltkreise in Computern ungewöhnlich und in unerwarteter Weise verhalten. Die Autoren dieses Bandes versuchen, solche Effekte theoretisch zu unterlegen. Am Beispiel von Situationen aus dem Alltag werden sehr verschiedene interessante Phänomene erklärt. (11/00) Zusammenfassung An understanding of high speed interconnect phenomena is necessary for modern designs such as routing and layout of computer motherboards. Computers have reached speeds where digital design must provide for these effects. The problem is that most engineers active today have not been trained in this subject. Inhaltsverzeichnis Preface. 1. The Importance of Interconnect Design. 1.1 The Basics. 1.2 The Past and the Future. 2. Ideal Transmission Line Fundamentals. 2.1 Transmission Line Structures on a PCB or MCM. 2.2 Wave Propagation. 2.3 Transmission Line Parameters. 2.3.1 Characteristic Impedance. 2.3.2 Propagation Velocity, Time, and Distance. 2.3.3 Equivalent Circuit Models for SPICE Simulation. 2.4 Launching Initial Wave and Transmission Line Reflections. 2.4.1 Initial Wave. 2.4.2 Multiple Reflections. 2.4.3 Effect of Rise Time on Reflections. 2.4.4 Reflections From Reactive Loads. 2.4.5 Termination Schemes to Eliminate Reflections. 2.5 Additional Examples. 2.5.1 Problem. 2.5.2 Goals. 2.5.3 Calculating the Cross-Sectional Geometry of the PCB. 2.5.4 Calculating the Propagation Delay. 2.5.5 Determining the Wave Shape Seen at the Receiver. 2.5.6 Creating an Equivalent Circuit. 3. Crosstalk. 3.1 Mutual Inductance and Mutual Capacitance. 3.2 Inductance and Capacitance Matrix. 3.3 Field Simulators. 3.4 Crosstalk-Induced Noise. 3.5 Simulating Crosstalk Using Equivalent Circuit Models. 3.6 Crosstalk-Induced Flight Time and Signal Integrity Variations. 3.6.1 Effect of Switching Patterns on Transmission Line Performance. 3.6.2 Simulating Traces in a Multiconductor System Using a Single-Line Equivalent Model. 3.7 Crosstalk Trends. 3.8 Termination of Odd- and Even-Mode Transmission Line Pairs. 3.8.1 Pi Termination Network. 3.8.2 T Termination Network. 3.9 Minimization of Crosstalk. 3.10 Additional Examples. 3.10.1 Problem. 3.10.2 Goals. 3.10.3 Determining the Maximum Crosstalk-Induced Impedance and Velocity Swing. 3.10.4 Determining if Crosstalk Will Induce False Triggers. 4. Nonideal Interconnect Issues. 4.1 Transmission Line Losses. 4.1.1 Conductor DC Losses. 4.1.2 Dielectric DC Losses. 4.1.3 Skin Effect. 4.1.4 Frequency-Dependent Dielectric Losses. 4.2 Variations in the Dielectric Constant. 4.3 Serpentine Traces. 4.4 Intersymbol Interference. 4.5 Effects of 90 Bends. 4.6 Effect of Topology. 5. Connectors, Packages, and Vias. 5.1 Vias. 5.2 Connectors. 5.2.1 Series Inductance. 5.2.2 Shunt Capacitance. 5.2.3 Connector Crosstalk. 5.2.4 Effect...
