Mapping Techniques for Embedded Systems Design - With Reliability Considerations

Network on Chip (NoC) arises as a scalable approach for high-performance embedded systems design. However, by using an entire communication network inside a integrated circuit rises new challenges. This book describes the task mapping problem for NoC, and proposes a solution based on the Population-Based Incremental Learning Algorithm. Several tests were performed to such algorithm and a Reliability figure of merit was integrated as an optimization criterium, for the sake of provide dependable behavior to the mapped application.

About the author

Freddy Bolaños is an Electrical Engineer who holds a Master and a Doctoral degree in Electronics. His major interests are related to High Performance Embedded Systems and Digital Signal Processing. Nowadays he works as a professor at Universidad Nacional de Colombia, Medellin campus.

Product details

• Authors: Freddy Bolaños
• Publisher: Editorial Académica Española
• Languages: Spanish
• Product format: Paperback / Softback
• Released: 07.08.2017
• EAN: 9786202233941
• ISBN: 978-620-2-23394-1
• No. of pages: 160
• Dimensions: 150 mm x 220 mm x 10 mm
• Weight: 256 g
• Subject: Natural sciences, medicine, IT, technology > IT, data processing > Hardware