Fr. 94.00

System on Chip Interfaces for Low Power Design

English · Paperback / Softback

Shipping usually within 1 to 3 weeks (not available at short notice)

Description

Read more

Informationen zum Autor Sanjeeb Mishra is a Validation Architect with Intel. He has 15 years of experience ranging from hardware system design to SOC validation for telecom, consumer electronics, PC and mobility products; and has specific expertise on SoC architecture for mobile devices. Neeraj Kumar Singh is a Platform Architect for tablet platforms at Intel. Prior to this he worked on CPU, Graphics and Chipset validation tools. His areas of expertise are hardware software co-design, SoC system architecture, and system software design and development. Vijayakrishnan Rousseau is a Technical Lead at Intel. He has 15 years of experience in GPU and SOC validation with specialization in Display interfaces like HDMI, Display Port and Emulation. Klappentext . System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact. Inhaltsverzeichnis SoC Design Fundamentals and Evolution Understanding Power Consumption Fundamentals Generic SoC Architecture and Components Display Interfaces Multimedia Interfaces Communication Interfaces Memory Interfaces Security Interfaces Power Interfaces Sensor Interfaces Input Device Interfaces Debug Interfaces Appendix A: USB3.0Appendix B: Industry ConsortiumsAppendix C: Overview of Intel SoC: Baytrail

List of contents

  1. SoC Design Fundamentals and Evolution
  2. Understanding Power Consumption Fundamentals
  3. Generic SoC Architecture and Components
  4. Display Interfaces
  5. Multimedia Interfaces
  6. Communication Interfaces
  7. Memory Interfaces
  8. Security Interfaces
  9. Power Interfaces
  10. Sensor Interfaces
  11. Input Device Interfaces
  12. Debug Interfaces
Appendix A: USB3.0Appendix B: Industry ConsortiumsAppendix C: Overview of Intel SoC: Baytrail

Customer reviews

No reviews have been written for this item yet. Write the first review and be helpful to other users when they decide on a purchase.

Write a review

Thumbs up or thumbs down? Write your own review.

For messages to CeDe.ch please use the contact form.

The input fields marked * are obligatory

By submitting this form you agree to our data privacy statement.