Fr. 149.00

Scalable Multi-core Architectures - Design Methodologies and Tools

English · Paperback / Softback

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Description

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As Moore's law continues to unfold, two important trends have recently emerged. First, the growth of chip capacity is translated into a corresponding increase of number of cores. Second, the parallelization of the computation and 3D integration technologies lead to distributed memory architectures.This book describes recent research that addresses urgent challenges in many-core architectures and application mapping. It addresses the architectural design of many core chips, memory and data management, power management, design and programming methodologies. It also describes how new techniques have been applied in various industrial case studies.

List of contents

Part I: HS/SW/ Building Blocks: Architecture, Methods, and Techniques.- 1. Memory Architecture and Management in an NoC Platform.- 2. Application-Specific Multi-Threaded Dynamic Memory Management.- 3. Power Management Architecture in McNoC.- 4. ASIP Exploration and Design.- Part II: System-level Exploration.- 5. System Exploration.- 6. MPA: Parallelization Made Easy.- Part III: Industrial Applications.- 7. MPSoC Architecture Performance Analysis for Agile SDR Radio Applications.- 8. Application of the MOSART Flow on the WiMAX (802.16e) PHY.

Summary

As Moore’s law continues to unfold, two important trends have recently emerged. First, the growth of chip capacity is translated into a corresponding increase of number of cores. Second, the parallelization of the computation and 3D integration technologies lead to distributed memory architectures.
This book describes recent research that addresses urgent challenges in many-core architectures and application mapping. It addresses the architectural design of many core chips, memory and data management, power management, design and programming methodologies. It also describes how new techniques have been applied in various industrial case studies.

Additional text

From the reviews:
“This book presents to the general public the most important results from the Mapping Optimization for Scalable Multi-core Architecture (MOSART) research project, which was carried out between 2008 and 2010 (three years). It is quite brief and organized into three parts. … this book is well organized and balanced. Each chapter is self-explanatory and can be studied separately. The book as a whole is a good demonstration of engineering. It deserves to be recommended to professionals and research students in the area.” (D. Grigoras, ACM Computing Reviews, June, 2012)

Report

From the reviews:
"This book presents to the general public the most important results from the Mapping Optimization for Scalable Multi-core Architecture (MOSART) research project, which was carried out between 2008 and 2010 (three years). It is quite brief and organized into three parts. ... this book is well organized and balanced. Each chapter is self-explanatory and can be studied separately. The book as a whole is a good demonstration of engineering. It deserves to be recommended to professionals and research students in the area." (D. Grigoras, ACM Computing Reviews, June, 2012)

Product details

Assisted by Jantsch (Editor), Jantsch (Editor), Axel Jantsch (Editor), Dimitrio Soudris (Editor), Dimitrios Soudris (Editor)
Publisher Springer, Berlin
 
Languages English
Product format Paperback / Softback
Released 01.01.2014
 
EAN 9781489993151
ISBN 978-1-4899-9315-1
No. of pages 223
Dimensions 157 mm x 13 mm x 235 mm
Weight 454 g
Illustrations XIV, 223 p.
Subjects Natural sciences, medicine, IT, technology > Technology > Electronics, electrical engineering, communications engineering

B, Computer-Aided Design (CAD), engineering, Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design, Computer-aided engineering, Electronic circuits, Electronic Circuits and Systems, parallel programming, parallelism

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