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Informationen zum Autor Dr. Pong P. Chu is an Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He obtained a BS degree from National Chiao Tung University, Taiwan, and a PhD from Iowa State University. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University. Klappentext Embedded SoPC design with Nios II processor and VHDL examples An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well. The new flexibility allows us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks. As these technologies have matured, they have gradually become mainstream practice, and it is now possible to use a PC and an inexpensive FPGA prototyping board to construct a complex digital system. This book uses a "learn by doing" approach and illustrates the hardware and software design and development process by a series of examples. An Altera FPGA prototyping board and its Nios II soft-core processor are used for this purpose. The emphasis of the book is on hardware design and integration, and the book is divided into four major parts: Part I covers HDL and synthesis of custom hardware Part II introduces the Nios II processor and provides an overview of embedded software development Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology The examples are realistic projects and can be implemented and tested on the board. Some can be used as basic IP cores to be incorporated into more sophisticated systems. An embedded SoPC utilizes both customized software and hardware and is a very powerful design paradigm. However, its design and development require knowledge of several computer engineering disciplines and involves an array of software tools. While it is rewarding, the learning can be a long and winding journey. The book shows the trailhead and guides readers through the initial steps to exploit the full potential of this emerging methodology. Zusammenfassung This book explores the unique hardware programmability of field-programmable gate array (FPGA)-based embedded systems, using a learning-by-doing approach to introduce the embedded system on a programmable chip (SoPC) concept and development process to new designers through hands-on experiments. Inhaltsverzeichnis Preface. Acknowledgments. 1. Ovweview of Embedded System. Part I. Basic Digital Circuits Development. 2. Gate-level Combinational Circuit. 3. Overview of FPGA and EDA Software. 4. RT-level Combinational Circuit. 5. Regular Sequential Circuit. 6. FSM. 7. FSMD. Part II. Basic NIOS II Software Development. 8. Nios II Processor Overview. 9. Nios II System Derivation and Low-Level Access. 10. Predesigned Nios II I/O Peripherals. 11. Predesigned Nios II I/O Drivers and HAL API. 12. Interrupt and ISR. Part III. Custom I/O Peripheral Development. 13. Custom I/...
