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The origin of the development of integrated circuits up to VLSI is found in the invention of the transistor, which made it possible to achieve the ac tion of a vacuum tube in a semiconducting solid. The structure of the tran sistor can be constructed by a manufacturing technique such as the intro duction of a small amount of an impurity into a semiconductor and, in ad dition, most transistor characteristics can be improved by a reduction of dimensions. These are all important factors in the development. Actually, the microfabrication of the integrated circuit can be used for two purposes, namely to increase the integration density and to obtain an improved perfor mance, e. g. a high speed. When one of these two aims is pursued, the result generally satisfies both. We use the Engl ish translation "very large scale integration (VLSIl" for "Cho LSI" in Japanese. In the United States of America, however, similar technology is bei ng developed under the name "very hi gh speed integrated circuits (VHSIl". This also originated from the nature of the integrated circuit which satisfies both purposes. Fortunately, the Japanese word "Cho LSI" has a wider meani ng than VLSI, so it can be used ina broader area. However, VLSI has a larger industrial effect than VHSI.
List of contents
1. lntroduction.- 1.1 The Significance of Semiconductor Integrated Circuits.- 1.2 Prospects of High-Density Integration.- 1.3 Device Dimensions and Density of Integration.- 1.4 Outline of the Microfabrication Technology.- 2. Electron Beam Lithography.- 2.1 Background.- 2.2 Components for Electron-Beam Lithography.- 2.3 Software for Electron-Beam Lithography.- 2.4 Wafer and Writing Systems.- 3. Pattern Replication Technology.- 3.1 UV Replication Technologies.- 3.2 Deep-UV Projection System.- 3.3 X-Ray Lithography.- 3.4 Electron-Beam Projection.- 3.5 Radiation-Sensitive Resist for Microfabrication.- 4. Mask Inspection Technology.- 4.1 Principles of Mask Inspection.- 4.2 Mask Inspection Systems.- 5. Crystal Technology.- 5.1 Overview.- 5.2 Impurities in Si Crystals.- 5.3 Wafer Bow and Warpage.- 5.4 Thermally Induced Microdefects.- 5.5 Epitaxial Growth.- 6. Process Technology.- 6.1 Dry Etching.- 6.2 Beam Annealing.- 6.3 Thin-Film Deposition Techniques.- 6.4 Metallization.- 6.5 Evaluation of Gate Oxide Film.- 6.6 Super Clean Environment.- 7. Fundamentals of Test and Evaluation.- 7.1 Testing and Evaluation of the Device Design.- 7.2 Device Analysis and Evaluation.- 7.3 Device Testing.- 8. Basic Device Technology.- 8.1 Background.- 8.2 Limitations for Miniaturization.- 8.3 Prediction of Device Performance Advancements.- 8.4 Examples of Device Structure.- 8.5 Device Structure.- References.
