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Compilation Techniques for Reconfigurable Architectures

English · Paperback / Softback

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The extreme ?exibility of recon?gurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of recon?gurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these recon?gurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must assume the role of hardware designers and software programmers and navigate a maze of program transformations, mapping, and synthesis steps to produce ef?cient recon?gurable computing implementations. The richness and sophistication of any of these application mapping steps make the mapping of computations to these architectures an increasingly daunting process. It is thus widely believed that automatic compilation from high-level programming languages is the key to the success of recon?gurable computing. This book describes a wide range of code transformations and mapping te- niques for programs described in high-level programming languages, most - tably imperative languages, to recon?gurable architectures.

Summary

The extreme ?exibility of recon?gurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of recon?gurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these recon?gurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must assume the role of hardware designers and software programmers and navigate a maze of program transformations, mapping, and synthesis steps to produce ef?cient recon?gurable computing implementations. The richness and sophistication of any of these application mapping steps make the mapping of computations to these architectures an increasingly daunting process. It is thus widely believed that automatic compilation from high-level programming languages is the key to the success of recon?gurable computing. This book describes a wide range of code transformations and mapping te- niques for programs described in high-level programming languages, most - tably imperative languages, to recon?gurable architectures.

Product details

Authors Pedro C. Diniz, João M. P. Cardoso, João M.P. Cardoso, João M Cardoso, Pedro C Diniz, João M P Cardoso
Publisher Springer, Berlin
 
Content Book
Product form Paperback / Softback
Publication date 02.02.2011
Subject Natural sciences, medicine, IT, technology > IT, data processing > IT
 
EAN 9781441935106
ISBN 978-1-4419-3510-6
Pages 223
Illustrations XII, 223 p. 88 illus.
Dimensions (packing) 15.5 x 23.5 cm
Weight (packing) 366 g
 
Subjects Elektrotechnik, A, Rechnerarchitektur und Logik-Entwurf, Microprocessors, computer science, Electrical Engineering, Electrical and Electronic Engineering, Programming, Architecture, Computer, Computer System Implementation, Computer architecture & logic design, Processor Architectures, Software Compilation
 

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