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The first encompassing treatise of this new and very important field puts the known physical limitations for classic 2D microelectronicsinto perspective with the requirements for further microelectronics developments and market necessities. This two-volume handbookpresents 3D solutions to the feature density problem, addressing all important issues, such as wafer processing, die bonding, packagingtechnology, and thermal aspects. It begins with an introductory part, which defines necessary goals, existing issues and relates 3D integrationto the semiconductor roadmap of the industry. Before going on to cover processing technology and 3D structure fabrication strategies indetail. This is followed by fields of application and a look at the future of 3D integration.The editors have assembled contributions from key academic and industrial players in the field, including Intel, Micron, IBM, Infineon,Qimonda, NXP, Philips, Toshiba, Semitool, EVG, Tezzaron, Lincoln Labs, Fraunhofer, RPI, IMEC, CEA-LETI and many others.
List of contents
1 Introduction to 3D Integration 2 Drivers for 3D Integration3 Overview of 3D Process TechnologyPart I - Through Silicon Via Fabrication4 Deep Reactive Ion Etching5 Laser Ablation6 Insulation - SiO27 Insulation - Organic Dielectrics8 Copper Plating9 Metallization by chemical vapor deposition of W and CuPart II - Wafer Thinning and Bonding Technology10 Fabrication, Processing and Singulation of Thin Wafers11 Overview of Bonding Technologies for 3D Integration12 Chip-to-Wafer and Wafer-to-Wafer Integration Schemes13 Polymer Adhesive Bonding Technology14 Bonding with Intermetallic CompoundsPart III - Integration Processes15 Commercial Activity16 Fraunhofer IZM17 Interconnect Process at the University of Arkansas18 Vertical Interconnection by ASET at Toshiba19 3D Integration at CEA-LETI20 Lincoln Laboratory's Integration Technology21 3D Integration Technologies at IMEC22 Fabrication Using Copper Thermo-Compression Bonding at MIT23 Rensselaer 3D Integration Processes24 3D Integration at Tezzaron Semiconductor Corporation25 3D Integration at Ziptronix, Inc.26 3D Integration at ZyCube Sendai Lab.Part IV - Design, Performance, and Thermal Management27 Design for 3D Integration at NC State University28 Design for 3D Integration at Fraunhofer IIS-EAS29 Multiproject Circuit Design and Layout in Lincoln Laboratory's 3D Technology30 Computer-aided Design for 3D Circuits at the University of Minnesota31 Electrical Performance of 3D Circuits32 Testing of 3D Circuits33 Thermal Management of Vertically Integrated Packages at IBM ZurichPart V - Applications34 3D and Microprocessors35 3D Memories36 Sensor Arrays37 Power Devices38 Wireless Sensor Systems - The e-CUBES Project39 Conclusions
About the author
Philip Garrou is a consultant in the field of thin film microelectronic materials and applications, prior to which he was Director of Technology and New Business Development for Dow Chemicals' Advanced Electronic Materials business. He has authored two microelectronics texts and is co-author of over 75 peer reviewed publications and book chapters.
Peter Ramm is head of the silicon technology department of the Fraunhofer Institute for Molecular Solid-State Technologies (EMFT) in Munich, Germany, where he is responsible for process integration of innovative devices and new materials. He received his Ph.D. in physics from the University of Regensburg and subsequently worked for Siemens before joining the Fraunhofer Institute for Solid State Technology (IFT) in Munich in 1988. He is the author or co-author of more than 50 papers and 20 patents.
Summary
Beiträge von Forschern und Strategen an Universitäten und aus der Industrie diskutieren hier die physikalischen Grenzen der klassischen 2D-Elektronik und beleuchten die Erfordernisse des Marktes sowie Ansatzpunkte für zukünftige Entwicklungen.
